In the fabrication of electrical circuits, especially those formed in semiconductor integrated circuits, processing variations often prevent the manufacture of precise components, for example resistors and capacitors. Accordingly, there is a need for a method of trimming devices to obtain the precise values.
One circuit which requires precise accuracy of components (in this case capacitors) is a charge redistribution analog-to-digital (or digital-to-analog) converter. This circuit utilizes an array of binary weighted capacitors. The accuracy of the A/D converter is mainly determined by the matching of the capacitors in the array. Experimentally, it has been shown that in fabricating the capacitors utilizing MOS technology, acceptable ratio matching accuracies of up to 10 bits can be obtained with good yields. However, to achieve accuracy greater than 10 bits, external means such as laser trimming is required to change the size and value of the capacitors as required which, in turn, will increase the typical yield. However, laser trimming is a very expensive and time consuming procedure; to fabricate an A/D converter utilizing laser trimming techniques could cost more than an acceptable amount.
Another problem with laser trimming is that it must be performed at the wafer level before the device is packaged, while capacitor matching depends on stray capacitance induced by the proximity of the packaging material.
Fuses have also been used to aid in compensating variations in manufactured components. For instance, a fuse may be used to selectively connect additional elements to create the desired output. It is often desirable to set the values of the fuses (i.e., open or short) subsequent to packaging. In addition, if a large number of fuses are needed on one chip, it may not be possible to include bond pads to access each of the fuses. In this case, a transistor decoder is required and the fusing current is limited. As a result, fuses may be only partially blown, i.e., neither open nor short. This ambiguity creates a situation in which indeterminate logic outputs may be created thereby rendering the circuit useless (or at least less useful).
Accordingly, improvements which overcome any or all of the problems are presently desirable.